Chiplet IP Reuse Trading Platform: Tape-out Licensing plus Mass-Production Revenue-Sharing Model

📌 Background

Chiplet heterogeneous integration splits large chips into reusable chiplets, and mature advanced packaging makes assembling chiplets from different process nodes into system-level chips a mainstream path. In 2026 industry reports, 'chiplet IP licensing and design services' and 'open-source and platform-based trading' are widely listed as core business model changes. Companies such as VeriSilicon have won large-scale orders through their SiPaaS (Silicon Platform as a Service) model, with AI computing-related orders accounting for over 80%. Small and medium chip design companies lack the ability to develop a full set of IP in-house, making paid chiplet licensing a rigid demand.

👤 Target Customers

Small and medium chip design companies, AI ASIC customization customers, and system vendors and end-brand owners that need rapid tape-out.

💰 Revenue Streams

1) One-time chiplet IP licensing fees (charged per tape-out); 2) custom design service fees (NRE one-time engineering fees); 3) post-mass-production royalty sharing based on shipped units; 4) platform matchmaking transaction commissions.

🧮 Cost Structure

Ongoing R&D investment in proprietary processor and interface IP, EDA toolchain licensing fees, tape-out verification and packaging/testing costs, and labor costs for the platform operations and technical support team.

🛡️ Moat

An independently controllable portfolio of six major processor IP categories and years of verification accumulation; one-stop platform capability from IP licensing to tape-out and mass production; early positioning in chiplet interconnect standards and the advanced packaging ecosystem.

🔑 Keys to Success

• Build a high-quality, silicon-proven IP library
• Bind with foundries and packaging/testing houses to form a closed delivery loop
• Establish a sound licensing billing and unit-tracking mechanism

⚠️ Risks

• Customer tape-out failure causes subsequent royalties to fall through
• Escalating export controls affect advanced-process tape-outs
• Standardization progress in the chiplet trading market falls short of expectations

🏢 Cases

• VeriSilicon provides IP licensing plus chip customization services under the SiPaaS model; in 2026, its backlog reached RMB 4.516 billion, with AI computing-related orders accounting for over 85%
• Zhongyin Microelectronics showcases an enterprise-level chip design technology platform and Chiplet heterogeneous integration solutions, promoting the industrialization of national standards for chiplet interconnect interfaces
• Industry research institutions in 2026 Chiplet reports list chiplet IP licensing and design services and platform-based trading as independent business model chapters

📊 SWOT Analysis